- p. 81: in the paragraph before Section 3.4.4, the 2nd sentence (“The collector must be … > VE).”) is incorrect. It should be removed.
- p. 88: in Figure 3.30, Vdd should be Vs. Also, in the paragraph, “voltage Vdd across the load” should be “voltage Vs across the load”
- p. 90: in the middle of the page, remove the sentence: “Note that Vs must be less than or equal to 5V in this example.” This sentence is wrong.
- p. 93: in Question 3.9, the polarity of the voltage source should be shown as positive on the top side.
- p. 184: in Equation 6.7, “1238” should be “12310“
- p. 284 and 306: in the circuit schematic, pin 2 of the EDE1144 should be connected to GND, not +5V. Also, the line connecting pin 7 on the PIC16F88 to pin 17 on the EDE1144 is not required (because it is not used).
- p. 287: in Figure 7.18, “RA0 through RA4” should be “RA0 through RA3”
- p. 380: in Equation 9.62, in the middle term on the left side, there should only be one dot (not two) above the xr, as in Equation 9.61.
- p. 411: in the figure at the end of DE 10.1, the XOR (exclusive OR) gate should not be there. The direction control and PWM lines must be attached to the H-bridge separately. Schmitt triggers can be used for noise suppression (if necessary) on each line.
If you find any additional errors, please report them to David.Alciatore@colostate.edu so they can be posted for the benefit of others. Thanks!